Renesas/DINOv2-Base-ONNX

DINOv2-Base (ONNX) – Renesas X5H

Not a classifier. DINOv2 is a self-supervised embedding backbone (ViT-Base). Its output is a last_hidden_state feature/embedding tensor, not class logits — do not treat this model as an ImageNet classifier.

Introduction

This repository hosts DINOv2 (ViT-Base) targeting the Renesas R-Car X5H platform for image feature-extraction (embedding) inference on the NPX6 NPU.

• Model Architecture: DINOv2 — self-supervised Vision Transformer (ViT-Base backbone)
• Source Model: facebook/dinov2-base — checkpoint dinov2_base
• Task: Image Feature Extraction — produces a last_hidden_state embedding tensor, suitable as input to downstream retrieval, clustering, or fine-tuned classification/segmentation heads
• Backbone: ViT-Base
• Parameters: 86M

Deployment Flow

The FP32 ONNX model is auto-cast to INT8 by the Renesas MWMX toolchain at compile time — no separate quantization step is required.

dinov2_base_model_int8_fromHF_fp32.onnx (FP32)
        │
        └─▶  MWMX Runtime  ──▶  INT8 auto-cast  ──▶  NPX6 NPU  ──▶  last_hidden_state

Provided Artifacts

Artifact	Status	Notes
FP32 (ONNX)	✅ Published	fp32/dinov2_base_model_int8_fromHF_fp32.onnx — auto-cast to INT8 by the MWMX toolchain at compile time (see Deployment Flow above); no separate INT8 file is shipped

Performance

Measured on Renesas R-Car X5H via the MWMX runtime (APM50 ship-performance CI pipeline).

Benchmark configuration: Single NPU · Batch size: 1 · Input resolution: not available from source data — TBD

Parameters	Runtime	Precision	Device	Latency (ms)	Type
86M	MWMX Runtime	INT8 (auto)	X5H · 1× NPU · 1 Core · 850 MHz	530.03538	Measured
86M	MWMX Runtime	INT8 (auto)	X5H · 1× NPU · 12 Cores · 850 MHz	321.912461	Measured

Accuracy

TBD — not applicable in the usual classification-accuracy sense. As an embedding backbone, quality would typically be evaluated via downstream task performance (e.g. k-NN classification, retrieval) or embedding similarity to the FP32 reference — not yet measured/published for this repo.

---

Runtime Details

MWMX Runtime

• Engine: Renesas MWMX (Middleware MX) native inference runtime
• Input format: FP32 ONNX (compiled by the MWMX toolchain)
• NPU execution precision: INT8 (auto-cast by MWMX toolchain)
• Execution target: NPX6-48K NPU on R-Car X5H
• Output: last_hidden_state — patch/token embedding tensor, not class logits

---

Prerequisites

To run inference on Renesas R-Car X5H, you need:

1. Renesas R-Car X5H board with NPX6 NPU
2. Renesas MWMX Runtime
3. Hugging Face CLI to download the model

Download

hf download Renesas/DINOv2-Base-ONNX --repo-type=model --include "fp32/*"

---

Benchmark Methodology

• HIL runs: Hardware-in-the-loop — measured on physical R-Car X5H silicon via the MWMX runtime (metawaremx_runtime CI pipeline, "APM50" ship-performance target)
• Precision: FP32 ONNX input; INT8 execution (auto-cast by MWMX)
• Slices: results reported for both 1 AI core and 12 AI cores per NPU instance